This invention relates to a technique for efficiently operating a plurality of CPUs, in particular, a compiler which generates a program for performing a parallel processing.
In recent years, along with microfabrication of a semiconductor device due to the advancement of a semiconductor manufacturing technology, it has become possible to integrate an enormous number of transistors. The advancement of the semiconductor manufacturing technology has also raised the clock frequency at which a CPU (processor) operates. However, power consumption of the CPU and power consumption during standby due to leakage currents have also been increased. Therefore, studies have been made to improve a processing capability of a CPU with a minimum consumption of power.
In particular, in a case of, for example, a large-scale parallel computer in which several tens and hundreds of CPUs are used to perform a parallel processing, a considerable amount of electric power is required. In addition, it is also necessary to deal with a large amount of heat radiated from the computers, the heat being equivalent to the electric power.
In order to reduce the power consumption of a CPU, a CPU having a power saving mechanism (power consumption reduction function) capable of dynamically varying a clock frequency and an operating voltage of the CPU is becoming popular. According to a CPU of this type, the clock frequency and the operating voltage are shifted to a minimum value during idle time, while the clock frequency and the operating voltage are shifted to a maximum value only at a heavy load. There has also been known another CPU in which the clock frequency and the operating voltage are shifted in stages according to load conditions. The shifting of the clock frequency and the operating voltage can be controlled based on a predetermined command issued with respect to the CPU from an OS or from an application through an OS.
As regards a program executed on a computer including a CPU having the above-mentioned power saving mechanism, there has been known a technique of embedding a code for functioning the power saving mechanism into an execution code obtained through compilation in which a source code is converted into the execution code (see, for example, JP 2003-44289 A).
According to the technique, first, a user program (source code) to which a parameter has been preset is inputted into a compiler, and the compiler outputs a provisional code (assembler). Next, the provisional code is executed and the execution state is stored as a profile.
Then, the user program is compiled with reference to the profile obtained by the execution of the provisional code, to thereby generate an output code as intended. The compiler refers to the profile so that the compiler can generate an optimal output code (load module) with consideration given to heat to be radiated from the CPU, based on the use state of the resource of the computer.